In designing and otherwise developing electronic systems comprising multiple integrated circuits, it is common practice for the system operation to be simulated using software-based development tools. Such multiple-chip simulations are useful in determining the extent of any interface issues that may arise within the system due to various operational factors, including clocking, data transfer, etc.
Conventional software-based development tools for simulating multiple-chip systems suffer from a number of significant drawbacks, as outlined below.
One such drawback is that the conventional software-based development tools generally require a separate software implementation for each different type or generation of chip within the multiple-chip system. This requirement results in additional development time and expense. There is generally no reusable simulation code provided that could facilitate the process for multiple-chip systems.
In addition, there is typically no simulation model available that provides sufficient flexibility to deal with multiple chips having differing clock speeds, latencies or other similar characteristics. For example, both clock and event based simulation are usually not supported within any single conventional development tool.
Furthermore, the conventional development tools generally also fail to provide adequate support for external chip “plug-ins” by customers or third party vendors of a given development entity. There is no common platform available for use with all or most of such plug-in chips, and as a result different interfaces are required in order to perform functions such as configuring and running the chips, monitoring statistics and other performance metrics, and analyzing network traffic or other types of data throughput.
It is therefore apparent that a need exists for improved software-based development tools that can provide a simulation framework capable of simultaneous simulation of multiple chips with potentially different clock speeds, latencies or other characteristics.